{
 "generated": "2026-11-02",
 "node": {
  "id": "map:chip-design-flow",
  "type": "Map",
  "name": "芯片设计全流程",
  "slug": "chip-design-flow",
  "map_kind": "structure",
  "page": "/graph/e/map/chip-design-flow/",
  "h1": "谁在往芯片设计的每一步里塞 AI",
  "scope": "这张图追的是从架构规格到流片良率的11个阶段，逐一标出当前真正在用的AI技术类型——不是\"这家公司说自己用了AI\"，是\"这一步具体用的是强化学习、生成式AI、预测性机器学习，还是干脆只是规则式自动化\"。",
  "methodology": "竞争格局是 Synopsys/Cadence/Siemens EDA 三强主导，外加芯片厂自研（Google、NVIDIA）和一批中国厂商（华大九天、芯华章、广立微、东方晶源）。成熟度极不均衡：物理实现阶段的强化学习和RTL/验证阶段的生成式AI已有客户验证的量化结果，IP选型阶段依然单薄（2026年才刚出现\"AI辅助IP发现\"的雏形），多数厂商的\"10X/45%\"这类数字是营销口径而非独立验证，务必核对信源日期再引用。",
  "overview": "11个阶段大致按\"前端设计→逻辑物理实现→签核测试→交给制造\"四段排布；05逻辑综合本质上并入06物理设计的同一套强化学习框架，没有独立的工具生态，图上单列只是为了对齐原始11阶段编号。",
  "overview_caption": "11个阶段的主导技术仍以预测性机器学习(蓝)为主——不起眼但最普遍；强化学习(红)集中在05/06物理实现；生成式AI(琥珀)在03最集中，2026年起也开始出现在01/02/04；GPU+生成式光刻(紫)只在10",
  "patterns": {
   "title": "AI 渗透的顺序，是验证手段的顺序",
   "intro": "下面四条是我对这张图谱的归纳，不是图谱里的统计结论：图里的数字只是各层的条目数，不代表市占或采用率。",
   "items": [
    {
     "head": "强化学习：集中在逻辑综合和物理设计",
     "text": "强化学习集中在逻辑综合和物理设计，因为功耗、性能、面积这类目标函数可以直接算出来。",
     "label": "本图",
     "map": [
      {
       "layer": 6,
       "text": "06 层"
      },
      {
       "t": "的 5 条全是强化学习；"
      },
      {
       "layer": 5,
       "text": "05 层"
      },
      {
       "t": "没有独立条目，并入 06 的同一套 RL。例外："
      },
      {
       "layer": 4,
       "text": "04 层"
      },
      {
       "t": "的 Synopsys VSO.ai 也用强化学习（覆盖率闭环），是图里唯一落在 05/06 之外的一条。"
      }
     ]
    },
    {
     "head": "生成式 AI：在 RTL 设计这一步最集中",
     "text": "生成式 AI 在 RTL 设计这一步最集中，做法是用 EDA 自己的正确性和 PPA 引擎给 LLM 的输出上闸门。",
     "label": "本图",
     "map": [
      {
       "layer": 3,
       "text": "03 层"
      },
      {
       "t": "的 5 条全是生成式 AI；"
      },
      {
       "layer": 1,
       "text": "01 层"
      },
      {
       "t": "、"
      },
      {
       "layer": 2,
       "text": "02 层"
      },
      {
       "t": "、"
      },
      {
       "layer": 4,
       "text": "04 层"
      },
      {
       "t": "各有 2 条，合计 11 条。"
      }
     ]
    },
    {
     "head": "预测性机器学习：不起眼但最普遍",
     "text": "预测性机器学习不起眼但最普遍，分布在时序收敛、物理验证、DFT：这几步的答案能在签核工具里复核，DFT 里测试 pattern 的削减还能直接换算成测试机时间，是少数能直接折成钱的环节。",
     "label": "本图",
     "map": [
      {
       "layer": 7,
       "text": "07 层"
      },
      {
       "t": "、"
      },
      {
       "layer": 8,
       "text": "08 层"
      },
      {
       "t": "、"
      },
      {
       "layer": 9,
       "text": "09 层"
      },
      {
       "t": "共 8 条，全是预测性 ML；全图 19 条，其余分布在 01、02、04、10、11 层。"
      }
     ]
    },
    {
     "head": "IP 选型：最薄的一层",
     "text": "IP 选型最薄：2026 年才冒出对话式的语义检索，没有量化验证。选哪个 IP“更好”，恰好最难自动打分。",
     "label": "本图",
     "map": [
      {
       "layer": 2,
       "text": "02 层"
      },
      {
       "t": "只有 4 条；对话式检索的两条（IC Manage GDP-AI、Perforce IPLM）都没有具名客户加量化效果，真 ML 的只有 NoC 拓扑生成一个点（Arteris FlexGen，厂商口径）。"
      }
     ]
    }
   ],
   "src": [
    {
     "t": "出处 · "
    },
    {
     "href": "/deepdive/ai-native-rd/#sec-07",
     "text": "《AI Native 时代的研发：写变便宜之后，稀缺的是什么》§ 07「AI 渗透的顺序，是验证手段的顺序」"
    },
    {
     "t": "。那篇从这四条得出的结论：AI 先吃下的，是有廉价、可信 verifier（判断结果对不对的验证手段）的环节。"
    }
   ]
  },
  "badges": [
   "最后更新 2026-10-15",
   "当前版本 v4",
   "下次复核 ~2026-12"
  ],
  "version": 4,
  "first_published": "2026-09-08",
  "last_updated": "2026-10-15",
  "next_review": "~2026-12",
  "summary": "芯片设计全流程11个阶段的AI采用现状图谱：架构规格、IP选型、RTL设计、功能验证、逻辑综合、物理设计、时序收敛、物理验证、DFT测试、计算光刻、流片后良率分析，按强化学习/生成式AI/预测性机器学习/GPU+生成式光刻/规则式自动化标注每个阶段的主导技术类型。",
  "tags": [
   "landscape",
   "chip-design",
   "eda",
   "semiconductor",
   "rl",
   "generative-ai"
  ],
  "version_log": [
   {
    "v": 1,
    "date": "2026-09-08",
    "summary": "首次建立：覆盖芯片设计全流程11个阶段（架构规格→IP选型→RTL设计→功能验证→逻辑综合→物理设计→时序收敛→物理验证→DFT测试→计算光刻→流片后良率分析），基于用户提供的行业调研报告整理，约30个玩家条目"
   },
   {
    "v": 2,
    "date": "2026-09-08",
    "summary": "五路并行深度调研更新，新增9个玩家条目（Siemens Fuse EDA AI Agent、IC Manage GDP-AI、Perforce IPLM、Synopsys AgentEngineer、Synopsys IC Validator、东方晶源 PanGen vPWQ + YieldBook），更新既有条目（ChipAgents/Cadence ChipStack新增具名客户、AlphaChip争议新增2025年12月IEEE TCAD论文、TSO.ai/Tessent数字口径修正等），trendbox全面改写"
   },
   {
    "v": 3,
    "date": "2026-10-13",
    "summary": "更正两处数字口径：①Siemens Questa One 条目里“验证占70%时间”改为 Siemens/Wilson 2026 研究的实测值49%，并注明60%-70%是工程投入口径；②AlphaChip 争议条目的“至今无第三方独立复现”改为中性表述，补充 Google 的反驳、Nature 2024年9月撤销存疑标注，以及“批评方自己的表述”的说明。"
   },
   {
    "v": 4,
    "date": "2026-10-15",
    "summary": "新增“跨层规律”一节及各层规律注释：四条归纳出自《AI Native 时代的研发》§07，标注为作者归纳而非图谱统计结论，写明强化学习（04 层 VSO.ai）和预测性 ML（01/02/04/10/11 层）的例外分布，并加回链；页面视觉改版为 DeepDive 风格（mint 主题、亮暗双模式），条目内容未改；更正页头版本标注（原写 v2 · 2026-09-08）。"
   }
  ],
  "changelog": [
   {
    "date": "2026-09-08",
    "version": "v1",
    "text": "首次建立：覆盖芯片设计全流程11个阶段（架构规格→IP选型→RTL设计→功能验证→逻辑综合→物理设计→时序收敛→物理验证→DFT测试→计算光刻→流片后良率分析），基于用户提供的行业调研报告整理，约30个玩家条目，按强化学习/生成式AI/预测性机器学习/GPU+生成式光刻/规则式自动化五类技术标注。"
   },
   {
    "date": "2026-09-08",
    "version": "v2",
    "text": "五路并行深度调研更新，新增9个玩家条目：Siemens Fuse EDA AI Agent(架构探索)、IC Manage GDP-AI/Perforce IPLM(IP发现)、Synopsys AgentEngineer(RTL/验证)、Synopsys IC Validator(物理验证)、东方晶源 PanGen vPWQ + YieldBook(计算光刻/良率分析，含背景说明)；更新既有条目：ChipAgents新增具名客户Andes Technology、Cadence ChipStack新增具名客户Altera/Tenstorrent、AlphaChip争议新增2025年12月IEEE TCAD同行评审论文、Cerebrus新增Samsung SARC案例、Calibre新增TSMC/Samsung Foundry量产认证、TSO.ai数字口径更新(25%→Samsung Foundry最新20%)、Tessent\"10x/5x\"溯源为Intel/Amazon(2024年数据)、Siemens Questa升级为Questa One Agentic Toolkit、芯华章新增Agentic EDA底座发布；trendbox全面改写反映以上变化。"
   },
   {
    "date": "2026-10-13",
    "version": "v3",
    "text": "更正两处数字口径：①Siemens Questa One 条目里“验证占70%时间”改为 Siemens/Wilson 2026 研究的实测值49%，并注明60%-70%是工程投入口径；②AlphaChip 争议条目的“至今无第三方独立复现”改为中性表述，补充 Google 的反驳、Nature 2024年9月撤销存疑标注，以及“批评方自己的表述”的说明。"
   },
   {
    "date": "2026-10-15",
    "version": "v4",
    "text": "新增“跨层规律”一节：四条归纳出自《AI Native 时代的研发：写变便宜之后，稀缺的是什么》§ 07，标注为作者归纳而非图谱统计结论，并在对应的层加规律注释和回链，同时写明强化学习和预测性 ML 各有的例外分布。页面视觉改版为 DeepDive 风格，条目内容未改。顺带更正页头版本标注（原写 v2 · 2026-09-08）。"
   }
  ],
  "tech_legend": {
   "rl": "强化学习 RL",
   "llm": "生成式AI / LLM",
   "mlp": "预测性机器学习",
   "gpu": "GPU加速 + 生成式光刻",
   "rba": "规则式自动化 RBA"
  },
  "n_layers": 11,
  "n_rows": 38,
  "degree": 0
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